Comparison of oxide breakdown progression in ultra-thin oxide silicon-on-insulator and bulk metal-oxide-semiconductor field effect transistors

نویسندگان

  • M. C. Chen
  • S. H. Ku
  • C. T. Chan
  • Tahui Wang
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Quantum Mechanical Simulation for Ultra-thin High-k Gate Dielectrics Metal Oxide Semiconductor Field Effect Transistors

High-k dielectric materials are being considered as replacement for SiO2 as the gate dielectric while retaining the low equivalent oxide thickness (EOT) required next generation metal oxide semiconductor field effect transistors (MOSFETs). In this paper, we simulate the capacitance – voltage (C-V) of n-type MOSFET devices with different high-k dielectric insulator numerically. According to the ...

متن کامل

Comparison between direct current and sinusoidal current stressing of gate oxides and oxide/silicon interfaces in metal–oxide–silicon field-effect transistors

Articles you may be interested in Observation of gate bias dependent interface coupling in thin silicon-on-insulator metal-oxide-semiconductor field-effect transistors Mobility comparison between front and back channels in ultrathin silicon-on-insulator metal-oxide-semiconductor field-effect transistors by the front-gate split capacitance-voltage method Appl. Trap evaluations of metal/oxide/sil...

متن کامل

A compact quantum correction model for symmetric double gate metal-oxide- semiconductor field-effect transistor

Articles you may be interested in Possible unified model for the Hooge parameter in inversion-layer-channel metal-oxide-semiconductor field-effect transistors J. Threshold voltage modeling under size quantization for ultra-thin silicon double-gate metal-oxide-semiconductor field-effect transistor GaN metal-oxide-semiconductor field-effect transistor inversion channel mobility modeling Modeling ...

متن کامل

Optimum Design for Eliminating Back Gate Bias Effect of Silicon-on- insulator Lateral Double Diffused Metal-oxide-semiconductor Field Effect Transistor with Low Doping Buried Layer

An optimum design with silicon-on-insulator (SOI) device structure was proposed to eliminate back gate bias effect of the lateral double diffused metal-oxide-semiconductor field effect transistor (LDMOSFET) and to improve breakdown voltage. The SOI structure was characterized by low doping buried layer (LDBL) inserted between the silicon layer and the buried oxide layer. The LDBL thickness is a...

متن کامل

Reliability of laser-activated low-temperature polycrystalline silicon thin-film transistors

Related Articles Physical understanding of negative bias temperature instability below room temperature J. Appl. Phys. 112, 104514 (2012) Lg=60nm recessed In0.7Ga0.3As metal-oxide-semiconductor field-effect transistors with Al2O3 insulator Appl. Phys. Lett. 101, 223507 (2012) The mechanisms of random trap fluctuation in metal oxide semiconductor field effect transistors Appl. Phys. Lett. 101, 2...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2014